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FE Design Implementation Engineer

🏢 Apple 📍 Cambridge, East of England, England 💼 Company - Public

Currency:

£42,000 - £65,000

£3,500 - £5,417 / mo

Verified Corporate Employer (Authorized Corporate Employer)

This vacancy is published by an accredited employer with authorized corporate payroll and standard compliance adherence.

Transatlantic Cost of Living & Purchasing Power Benchmark

Verified Analytics

Location Base

Cambridge, East of England, England

Tier-1 UK Economic Zone

Est. Take-Home Pay

68% - 74% (After PAYE & NI)

Single tax filer baseline

Transatlantic Parity

1.0 GBP ≈ $1.28 USD Living Standard

Direct corporate benchmark

Position Overview & Specifications

Summary

Posted: Dec 7, 2022

Role Number:200350818

Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you will help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You will ensure Apple products and services can seamlessly handle the tasks that make them beloved by millions. Joining this group means you will be crafting and building the technology that fuels Apple’s devices. Together, we enable our customers to do all the things they love with their devices. In this role, you will be responsible for synthesis, timing closure, and power optimisation of Apple developed GPUs. As part of the Hardware design team, you will collaborate closely with the RTL Design and PD teams to ensure creation of the highest quality gate-level netlists.

Key Qualifications

Experience with front-end design synthesis and large chip integration;
Proficient in timing analysis, formal logic equivalence and lint checks;
Proficient in multi-clock, multi-mode and multi-power-domain designs;
Understanding of physical concepts like floor-planning, placement, congestion, and setup/hold timing closure;
Hands on experience with ECOs for functionality and timing;
Ability to propose logically equivalent RTL transforms to reduce power & area;
Familiarity with DFT insertion;
Familiarity with simulation, debugging tools and experience of working closely with design verification team;
Scripting and programming experience;
Experience with RTL - System Verilog or VHDL;
Experience working on CPUs, GPUs, or DSPs is desirable;
Excellent written and verbal communication, excellent organisation skills, and highly self-motivated;
Ability to work well in a team and be productive under aggressive schedules.

Description

Own unit RTL to gate-level netlist synthesis Use advanced synthesis techniques to meet aggressive timing, power, and area targets Propose novel synthesis and RTL solutions to improve netlist quality Work with RTL design and Physical Design teams to deliver best-in-class GPU designs

Education & Experience

MS in EE/CS/ECS

Additional Requirements

Partner Career Resources • Adsterra Native Ad

Candidate Selection & Onboarding Process

Application & Resume Screening

Submit your tailored CV/Resume directly to the talent acquisition portal.

Technical & Competency Interviews

Virtual interviews with the hiring manager and multidisciplinary team.

Formal Offer & Benefits Negotiation

Written agreement outlining compensation, equity, retirement vesting, and relocation allowances.

Onboarding & Corporate Integration

Equipment provisioning, team orientation, and commencement of duties.

International Career Advisory • Verified Partner Network

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Hiring Organization

Apple

Apply for this Position

Location: Cambridge, East of England, England

Eligibility: Verified Employer Direct Placement

Schedule: Company - Public

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Quick Action FE Design Implementation Engineer